As a measure for improving viewing angle dependence of gamma characteristics in liquid crystal display devices (for example, holding down excess brightness and the like in a screen), a liquid crystal display device has been proposed which controls a plurality of sub-pixels in a pixel to have different brightness, so as to display a halftone by an area coverage modulation of these sub-pixels (pixel division mode; for example, see Patent Literature 1).
An active matrix substrate disclosed in Patent Literature 1 (see FIG. 31) has two pixel electrodes 190a and 190b disposed in a pixel region; a source electrode 178 of a transistor is connected to a data line 171, and a drain electrode 175 is connected to the pixel electrode 190a via a contact hole 185. Moreover, a coupling electrode 176 is connected to the drain electrode 175 of the transistor via an expansion 177. The pixel electrode 190b overlaps the coupling electrode 176 in such a manner that a protective film (channel protective film) is sandwiched between the pixel electrode 190b and the coupling electrode 176, whereby a capacitor (coupling capacitor) is formed at this overlapping part. Via this formed capacitor, the pixel electrode 109a connected to the transistor is connected to the pixel electrode 109b which is in an electrically floating state (capacitively coupled pixel division mode). A liquid crystal display device using this active matrix substrate allows sub-pixels corresponding to the pixel electrode 190a to be bright sub-pixels and sub-pixels corresponding to the pixel electrode 190b to be dark sub-pixels. It is thus possible to display a halftone by the area coverage modulation of these bright sub-pixels and dark sub-pixels. However, with the configuration disclosed in Patent Literature 1, the coupling electrode 176 and the pixel electrode 190b easily short-circuit in their overlapping parts.
Patent Literature 2 discloses a configuration in which a pixel electrode in an electrically floating state (pixel electrode corresponding to a dark sub-pixel) is connected to a lower layer capacitor electrode formed in a same layer as a scanning signal line (on a substrate), and a pixel electrode connected to a transistor is connected to an upper layer capacitor electrode formed in a same layer as a data signal line (on a gate insulating film). The upper layer capacitor electrode overlaps the lower layer capacitor electrode in such a manner that the gate insulating film is sandwiched between the upper layer capacitor electrode and the lower layer capacitor electrode, whereby a coupling capacitor is formed at this overlapping part.
Citation List
Patent Literature
Patent Literature 1
Japanese Patent Application. Publication, Tokukai, No. 2006-221174 A (Publication Date: Aug. 24, 2006)
Patent Literature 2
Japanese Patent Application Publication, Tokukai, No. 2005-346082 A (Publication Date: Dec. 15, 2005)